Вс июн 10, 2012 18:08:42
; trancieves byte through SPI
; in R16 - byte to transmit
; out R16 - received byte
; uses R18,R19
spi:
out USIDR,R16
ldi R18,(1<<USIWM0)|(1<<USITC)
ldi R19,(1<<USIWM0)|(1<<USITC)|(1<<USICLK)
out USICR,R18
out USICR,R19
out USICR,R18
out USICR,R19
out USICR,R18
out USICR,R19
out USICR,R18
out USICR,R19
out USICR,R18
out USICR,R19
out USICR,R18
out USICR,R19
out USICR,R18
out USICR,R19
out USICR,R18
out USICR,R19
in R16,USIDR
ret
SPI_MasterInit:
; Set MOSI and SCK output, all others input
ldi r17,(1<<DD_MOSI)|(1<<DD_SCK)
out DDR_SPI,r17
; Enable SPI, Master, set clock rate fck/16
ldi r17,(1<<SPE)|(1<<MSTR)|(1<<SPR0)
out SPCR,r17
ret
SPI_MasterTransmit:
; Start transmission of data (r16)
out SPDR,r16
Wait_Transmit:
; Wait for transmission complete
in r16, SPSR
sbrs r16, SPIF
rjmp Wait_Transmit
ret