Пт сен 14, 2018 13:32:46
Пт сен 14, 2018 14:34:51
Пт сен 14, 2018 14:55:02
Пт сен 14, 2018 19:52:03
Сб сен 15, 2018 03:59:22
Сб окт 20, 2018 17:38:16
Сб окт 20, 2018 22:56:47
Вс окт 21, 2018 12:56:10
Вс окт 21, 2018 16:44:10
Пн окт 22, 2018 08:27:10
Пн окт 22, 2018 13:52:31
Пн окт 22, 2018 16:28:03
Пн окт 22, 2018 18:52:59
Вт окт 23, 2018 14:51:52
ItStatus1 = SpiReadRegister(0xf1); // возвращает 0x14.
halRfWriteReg(IOCFG0,0x0d); //GDO0 Output Pin Configuration
halRfWriteReg(FIFOTHR,0x47); //RX FIFO and TX FIFO Thresholds
halRfWriteReg(SYNC1,0x00); //Sync Word, High Byte
halRfWriteReg(SYNC0,0x00); //Sync Word, Low Byte
halRfWriteReg(PKTLEN,0x00); //Packet Length
halRfWriteReg(PKTCTRL0,0x32);//Packet Automation Control
halRfWriteReg(FSCTRL1,0x06); //Frequency Synthesizer Control
halRfWriteReg(FSCTRL0,0x00);
halRfWriteReg(FREQ2,0x10); //Frequency Control Word, High Byte
halRfWriteReg(FREQ1,0xB0); //Frequency Control Word, Middle Byte
halRfWriteReg(FREQ0,0x71); //Frequency Control Word, Low Byte
halRfWriteReg(MDMCFG4,0xA7); //Modem Configuration
halRfWriteReg(MDMCFG3,0x32); //Modem Configuration
halRfWriteReg(MDMCFG2,0x30); //Modem Configuration
halRfWriteReg(MDMCFG1,0x22);
halRfWriteReg(MDMCFG0,0xF8);
halRfWriteReg(DEVIATN,0x40); //Modem Deviation Setting
halRfWriteReg(MCSM2,0x07); //Main Radio Control State Machine Configuration
halRfWriteReg(MCSM1,0x30); //Main Radio Control State Machine Configuration
halRfWriteReg(MCSM0,0x18); //Main Radio Control State Machine Configuration
halRfWriteReg(FOCCFG,0x16); //Frequency Offset Compensation Configuration
halRfWriteReg(AGCCTRL2,0x04);//AGC Control
halRfWriteReg(AGCCTRL1,0x00);//AGC Control
halRfWriteReg(AGCCTRL0,0x92);//AGC Control
halRfWriteReg(WORCTRL,0xFB); //Wake On Radio Control
halRfWriteReg(FREND1,0xB6); //Front End TX Configuration
halRfWriteReg(FREND0,0x11); //Front End TX Configuration
halRfWriteReg(FSCAL3,0xE9); //Frequency Synthesizer Calibration
halRfWriteReg(FSCAL2,0x2A); //Frequency Synthesizer Calibration
halRfWriteReg(FSCAL1,0x00); //Frequency Synthesizer Calibration
halRfWriteReg(FSCAL0,0x1F); //Frequency Synthesizer Calibration
halRfWriteReg(TEST2,0x81); //Various Test Settings
halRfWriteReg(TEST1,0x35); //Various Test Settings
halRfWriteReg(TEST0,0x09); //Various Test Settings
Вт окт 23, 2018 21:39:00
Ср окт 24, 2018 15:32:10
модуляция ASK как понимаю простая азбука морзе, когда есть несущая логическая '1', когда нет логический '0'. Пробовал подключал китайский приемник CHJ-9921, он кажет сигнал на выходе рис.1. Посмотрел сигнал на SPI, тоже все нормально рис.2. Смотрел на ножках SCLK и SI. Сигнал SC есть проверял.методов модуляции передатчика и приёмника
void halRfWriteReg(uint8_t reg, uint8_t value)
{
uint8_t buf[2];
buf[0] = reg;
buf[1] = value;
spi_xfer_done = false;
nrf_drv_spi_transfer(&spi, buf, 2, NULL, 0);
while (!spi_xfer_done)
{
__WFE();
}
}
uint8_t SpiReadRegister (uint8_t reg)
{
uint8_t buf[2];
buf[0] = reg;
buf[1] = 0;
spi_xfer_done = false;
nrf_drv_spi_transfer(&spi, buf, 2, buf, 2);
while (!spi_xfer_done)
{
__WFE();
}
return(buf[1]);
}
void init_RF(void)
{
ItStatus1 = SpiReadRegister(0xf1);
halRfWriteReg(IOCFG2,0x0d); //GDO0 Output Pin Configuration
//ItStatus1 = SpiReadRegister(IOCFG2);
halRfWriteReg(FIFOTHR,0x07); //RX FIFO and TX FIFO Thresholds
halRfWriteReg(SYNC1,0x00); //Sync Word, High Byte
halRfWriteReg(SYNC0,0x00); //Sync Word, Low Byte
halRfWriteReg(PKTLEN,0x00); //Packet Length
halRfWriteReg(PKTCTRL0,0x32);//Packet Automation Control
halRfWriteReg(FSCTRL1,0x06); //Frequency Synthesizer Control
halRfWriteReg(FSCTRL0,0x00);
halRfWriteReg(FREQ2,0x10); //Frequency Control Word, High Byte
halRfWriteReg(FREQ1,0xB0); //Frequency Control Word, Middle Byte
halRfWriteReg(FREQ0,0x71); //Frequency Control Word, Low Byte
halRfWriteReg(MDMCFG4,0xAC); //Modem Configuration
halRfWriteReg(MDMCFG3,0x22); //Modem Configuration
halRfWriteReg(MDMCFG2,0x30); //Modem Configuration
halRfWriteReg(MDMCFG1,0x22);
halRfWriteReg(MDMCFG0,0xF8);
halRfWriteReg(DEVIATN,0x40); //Modem Deviation Setting
halRfWriteReg(MCSM2,0x07); //Main Radio Control State Machine Configuration
halRfWriteReg(MCSM1,0x30); //Main Radio Control State Machine Configuration
halRfWriteReg(MCSM0,0x18); //Main Radio Control State Machine Configuration
halRfWriteReg(FOCCFG,0x16); //Frequency Offset Compensation Configuration
halRfWriteReg(AGCCTRL2,0x04);//AGC Control
halRfWriteReg(AGCCTRL1,0x00);//AGC Control
halRfWriteReg(AGCCTRL0,0x92);//AGC Control
halRfWriteReg(WORCTRL,0xFB); //Wake On Radio Control
halRfWriteReg(FREND1,0xB6); //Front End TX Configuration
halRfWriteReg(FREND0,0x11); //Front End TX Configuration
halRfWriteReg(FSCAL3,0xE9); //Frequency Synthesizer Calibration
halRfWriteReg(FSCAL2,0x2A); //Frequency Synthesizer Calibration
halRfWriteReg(FSCAL1,0x00); //Frequency Synthesizer Calibration
halRfWriteReg(FSCAL0,0x1F); //Frequency Synthesizer Calibration
halRfWriteReg(TEST2,0x81); //Various Test Settings
halRfWriteReg(TEST1,0x35); //Various Test Settings
halRfWriteReg(TEST0,0x09); //Various Test Settings
}
Чт ноя 01, 2018 07:06:55
int main(void)
{
bool erase_bonds;
NRF_POWER->DCDCEN = 1;
// Initialize.
uart_init();
log_init();
timers_init();
buttons_leds_init(&erase_bonds);
power_management_init();
ble_stack_init();
gap_params_init();
gatt_init();
services_init();
advertising_init();
conn_params_init();
NRF_LOG_INFO("Debug logging for UART over RTT started.");
advertising_start();
nrf_fstorage_api_t * p_fs_api;
p_fs_api = &nrf_fstorage_sd;
nrf_fstorage_init(&fstorage, p_fs_api, NULL);
init_button();
init_Timer_1(); // инициализация таймера 1 обработка клавиатуры
NRF_SAADC->CH[0].CONFIG = (SAADC_CH_CONFIG_GAIN_Gain1_4 << SAADC_CH_CONFIG_GAIN_Pos) |
(SAADC_CH_CONFIG_MODE_SE << SAADC_CH_CONFIG_MODE_Pos) |
(SAADC_CH_CONFIG_REFSEL_VDD1_4 << SAADC_CH_CONFIG_REFSEL_Pos) |
(SAADC_CH_CONFIG_RESN_Bypass << SAADC_CH_CONFIG_RESN_Pos) |
(SAADC_CH_CONFIG_RESP_Bypass << SAADC_CH_CONFIG_RESP_Pos) |
(SAADC_CH_CONFIG_TACQ_40us << SAADC_CH_CONFIG_TACQ_Pos);
NRF_SAADC->CH[0].PSELP = SAADC_CH_PSELP_PSELP_AnalogInput0 << SAADC_CH_PSELP_PSELP_Pos;
NRF_SAADC->CH[0].PSELN = SAADC_CH_PSELN_PSELN_NC << SAADC_CH_PSELN_PSELN_Pos;
NRF_SAADC->RESOLUTION = SAADC_RESOLUTION_VAL_14bit << SAADC_RESOLUTION_VAL_Pos;
NRF_SAADC->RESULT.MAXCNT = 16;
NRF_SAADC->RESULT.PTR = (uint32_t)&result;
NRF_SAADC->SAMPLERATE = 0x7FF | SAADC_SAMPLERATE_MODE_Timers << SAADC_SAMPLERATE_MODE_Pos;
NRF_SAADC->ENABLE = SAADC_ENABLE_ENABLE_Enabled << SAADC_ENABLE_ENABLE_Pos;
NRF_SAADC->TASKS_CALIBRATEOFFSET = 1;
while (NRF_SAADC->EVENTS_CALIBRATEDONE == 0);
NRF_SAADC->EVENTS_CALIBRATEDONE = 0;
while (NRF_SAADC->STATUS == (SAADC_STATUS_STATUS_Busy <<SAADC_STATUS_STATUS_Pos));
NRF_SAADC->TASKS_START = 1;
while (NRF_SAADC->EVENTS_STARTED == 0);
NRF_SAADC->EVENTS_STARTED = 0;
NRF_SAADC->TASKS_SAMPLE = 1;
// while (NRF_SAADC->EVENTS_END == 0);
// NRF_SAADC->EVENTS_END = 0;
array_test[0] = 0x8a;
array_test[1] = 0xa0;
NRF_GPIO->DIRSET |= (1UL << SDN);
NRF_GPIO->PIN_CNF[SDN] = (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos) |
(GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
(GPIO_PIN_CNF_DRIVE_Msk) |
(GPIO_PIN_CNF_SENSE_Msk);
NRFX_IRQ_PRIORITY_SET(GPIOTE_IRQn, NRFX_GPIOTE_CONFIG_IRQ_PRIORITY);
NVIC_EnableIRQ(GPIOTE_IRQn);
NRF_GPIOTE->CONFIG[0] = (GPIOTE_CONFIG_POLARITY_HiToLo << GPIOTE_CONFIG_POLARITY_Pos)
| (30 << GPIOTE_CONFIG_PSEL_Pos)
| (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos);
NRF_GPIOTE->INTENSET = GPIOTE_INTENSET_IN0_Set << GPIOTE_INTENSET_IN0_Pos;
init_pin_RF(); // инициализируем порты ввода вывода cc1101
POWER_UP_RESET_CC1100();
init_RF(); // инициализация cc1101
ItStatus1 = SpiTxRxByte(0x3D);
nrf_delay_ms(10);
ItStatus1 = SpiTxRxByte(0x34);
// Enter main loop.
for (;;)
{
idle_state_handle();
Scan_Key();// сканирование клавиатуры
}
}
void RESET_CC1100(void)
{
Low_CC1100_CSN ;
while( ((NRF_GPIO->IN >> SPI_MISO_PIN) & 1UL) != 0);
SpiTxRxByte(CCxxx0_SRES); //Reset command
while( ((NRF_GPIO->IN >> SPI_MISO_PIN) & 1UL) != 0);
Hign_CC1100_CSN;
}
void POWER_UP_RESET_CC1100(void)
{
Hign_CC1100_CSN;
for(unsigned char i = 0; i < 128; i++){__NOP();}
Low_CC1100_CSN ;
for(unsigned char i = 0; i < 128; i++){__NOP();}
Hign_CC1100_CSN;
nrf_delay_ms(5);
RESET_CC1100(); // Reset CC1100
}
void init_pin_RF(void)
{
NRF_GPIO->DIRSET |= (1UL << SPI_SCK_PIN);
NRF_GPIO->DIRSET |= (1UL << SPI_MOSI_PIN);
NRF_GPIO->DIRSET = (0UL << SPI_MISO_PIN);
NRF_GPIO->PIN_CNF[SPI_MISO_PIN] = (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos) |
(GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos);
Hign_CC1100_CSN; // установка cs в еденицу
}
void halRfWriteReg(uint8_t reg, uint8_t value)
{
uint8_t buf[2]; // локальный буфер для записи в cc1101
buf[0] = reg; // регистр адреса
buf[1] = value; // что записываем в регистр
NRF_SPIM0->ENABLE &= ~(SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos); // выключаем SPI
NRF_SPIM0->INTENSET = 0; // выключаем все прирывания
NRF_SPIM0->PSEL.SCK = SPI_SCK_PIN; // вывод CLK
NRF_SPIM0->PSEL.MOSI = SPI_MOSI_PIN; // вывод MOSI
NRF_SPIM0->PSEL.MISO = SPI_MISO_PIN; // ввод MISO
NRF_SPIM0->FREQUENCY = SPIM_FREQUENCY_FREQUENCY_M4; // установленая скорость 4 МГц
NRF_SPIM0->RXD.PTR = NULL;
NRF_SPIM0->RXD.MAXCNT = 0;
NRF_SPIM0->RXD.LIST = (SPIM_RXD_LIST_LIST_Disabled << SPIM_RXD_LIST_LIST_Pos);
NRF_SPIM0->TXD.PTR = (uint32_t)&buf;
NRF_SPIM0->TXD.MAXCNT = sizeof(buf);
NRF_SPIM0->TXD.LIST = (SPIM_RXD_LIST_LIST_Disabled << SPIM_RXD_LIST_LIST_Pos);
NRF_SPIM0->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) | (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos) | (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos);
NRF_SPIM0->ENABLE |= (SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos); // включаем SPI
Low_CC1100_CSN;
while( ((NRF_GPIO->IN >> SPI_MISO_PIN) & 1UL) != 0);
NRF_SPIM0->EVENTS_ENDRX = 0;
NRF_SPIM0->EVENTS_ENDTX = 0;
NRF_SPIM0->EVENTS_END = 0;
NRF_SPIM0->EVENTS_STARTED = 0;
NRF_SPIM0->EVENTS_STOPPED = 0;
NRF_SPIM0->TASKS_START = 1; // стартуем
while (NRF_SPIM0->EVENTS_STARTED == 0); // ждем событие старта
while(NRF_SPIM0->EVENTS_ENDTX == 0); // ждем события окончания передачи данных
NRF_SPIM0->EVENTS_ENDTX = 0;
Hign_CC1100_CSN;
}
uint8_t SpiTxRxByte(uint8_t dat) // отправка одного байта в cc1101
{
uint8_t buf[1], buf_RX[1]; // локальный буфер для записи в cc1101
buf[0] = dat; // регистр адреса
buf_RX[0] = 0;
NRF_SPIM0->ENABLE &= ~(SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos); // выключаем SPI
NRF_SPIM0->INTENSET = 0; // выключаем все прирывания
NRF_SPIM0->PSEL.SCK = SPI_SCK_PIN; // вывод CLK
NRF_SPIM0->PSEL.MOSI = SPI_MOSI_PIN; // вывод MOSI
NRF_SPIM0->PSEL.MISO = SPI_MISO_PIN; // ввод MISO
NRF_SPIM0->FREQUENCY = SPIM_FREQUENCY_FREQUENCY_M4; // установленая скорость 4 МГц
NRF_SPIM0->RXD.PTR = (uint32_t)&buf_RX;
NRF_SPIM0->RXD.MAXCNT = sizeof(buf_RX);
NRF_SPIM0->RXD.LIST = (SPIM_RXD_LIST_LIST_Disabled << SPIM_RXD_LIST_LIST_Pos);
NRF_SPIM0->TXD.PTR = (uint32_t)&buf;
NRF_SPIM0->TXD.MAXCNT = sizeof(buf);
NRF_SPIM0->TXD.LIST = (SPIM_RXD_LIST_LIST_Disabled << SPIM_RXD_LIST_LIST_Pos);
NRF_SPIM0->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) | (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos) | (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos);
NRF_SPIM0->ENABLE |= (SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos); // включаем SPI
Low_CC1100_CSN;
while( ((NRF_GPIO->IN >> SPI_MISO_PIN) & 1UL) != 0);
NRF_SPIM0->EVENTS_ENDRX = 0;
NRF_SPIM0->EVENTS_ENDTX = 0;
NRF_SPIM0->EVENTS_END = 0;
NRF_SPIM0->EVENTS_STARTED = 0;
NRF_SPIM0->EVENTS_STOPPED = 0;
NRF_SPIM0->TASKS_START = 1; // стартуем
while (NRF_SPIM0->EVENTS_STARTED == 0); // ждем событие старта
while(NRF_SPIM0->EVENTS_END == 0); // ждем события окончания передачи данных
NRF_SPIM0->EVENTS_END = 0;
Hign_CC1100_CSN;
return(buf_RX[0]);
}
uint8_t SpiReadRegister (uint8_t reg)
{
uint8_t buf[2]; // локальный буфер для записи в cc1101
buf[0] = reg; // регистр адреса
buf[1] = 0;
NRF_SPIM0->ENABLE &= ~(SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos); // выключаем SPI
NRF_SPIM0->INTENSET = 0; // выключаем все прирывания
NRF_SPIM0->PSEL.SCK = SPI_SCK_PIN; // вывод CLK
NRF_SPIM0->PSEL.MOSI = SPI_MOSI_PIN; // вывод MOSI
NRF_SPIM0->PSEL.MISO = SPI_MISO_PIN; // ввод MISO
NRF_SPIM0->FREQUENCY = SPIM_FREQUENCY_FREQUENCY_M4; // установленая скорость 4 МГц
NRF_SPIM0->RXD.PTR = (uint32_t)&buf;
NRF_SPIM0->RXD.MAXCNT = sizeof(buf);
NRF_SPIM0->RXD.LIST = (SPIM_RXD_LIST_LIST_Disabled << SPIM_RXD_LIST_LIST_Pos);
NRF_SPIM0->TXD.PTR = (uint32_t)&buf;
NRF_SPIM0->TXD.MAXCNT = sizeof(buf);
NRF_SPIM0->TXD.LIST = (SPIM_RXD_LIST_LIST_Disabled << SPIM_RXD_LIST_LIST_Pos);
NRF_SPIM0->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) | (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos) | (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos);
NRF_SPIM0->ENABLE |= (SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos); // включаем SPI
Low_CC1100_CSN;
while( ((NRF_GPIO->IN >> SPI_MISO_PIN) & 1UL) != 0);
NRF_SPIM0->EVENTS_ENDRX = 0;
NRF_SPIM0->EVENTS_ENDTX = 0;
NRF_SPIM0->EVENTS_END = 0;
NRF_SPIM0->EVENTS_STARTED = 0;
NRF_SPIM0->EVENTS_STOPPED = 0;
NRF_SPIM0->TASKS_START = 1; // стартуем
while (NRF_SPIM0->EVENTS_STARTED == 0); // ждем событие старта
while(NRF_SPIM0->EVENTS_END == 0); // ждем события окончания передачи данных
NRF_SPIM0->EVENTS_END = 0;
Hign_CC1100_CSN;
return(buf[1]);
}
void init_RF(void)
{
ItStatus1 = SpiReadRegister(0xf1 | 0x80);
/*halRfWriteReg(IOCFG0,0x2E); //GDO0 Output Pin Configuration
halRfWriteReg(IOCFG2,0x0d); //GDO0 Output Pin Configuration
ItStatus1 = SpiReadRegister(IOCFG2 | 0x80);
halRfWriteReg(FIFOTHR,0x07); //RX FIFO and TX FIFO Thresholds
halRfWriteReg(SYNC1,0x00); //Sync Word, High Byte
halRfWriteReg(SYNC0,0x00); //Sync Word, Low Byte
halRfWriteReg(PKTLEN,0x00); //Packet Length
halRfWriteReg(PKTCTRL1,0x00);//Packet Automation Control
halRfWriteReg(PKTCTRL0,0x32);//Packet Automation Control
halRfWriteReg(FSCTRL1,0x06); //Frequency Synthesizer Control
halRfWriteReg(FSCTRL0,0x00);
halRfWriteReg(FREQ2,0x10); //Frequency Control Word, High Byte
halRfWriteReg(FREQ1,0xB1); //Frequency Control Word, Middle Byte
halRfWriteReg(FREQ0,0x3b); //Frequency Control Word, Low Byte
halRfWriteReg(MDMCFG4,0xAC); //Modem Configuration
halRfWriteReg(MDMCFG3,0x22); //Modem Configuration
halRfWriteReg(MDMCFG2,0x30); //Modem Configuration
halRfWriteReg(MDMCFG1,0x22);
halRfWriteReg(MDMCFG0,0xF8);
halRfWriteReg(DEVIATN,0x40); //Modem Deviation Setting
halRfWriteReg(MCSM2,0x07); //Main Radio Control State Machine Configuration
halRfWriteReg(MCSM1,0x30); //Main Radio Control State Machine Configuration
halRfWriteReg(MCSM0,0x18); //Main Radio Control State Machine Configuration
halRfWriteReg(FOCCFG,0x16); //Frequency Offset Compensation Configuration
halRfWriteReg(AGCCTRL2,0x04);//AGC Control
halRfWriteReg(AGCCTRL1,0x00);//AGC Control
halRfWriteReg(AGCCTRL0,0x92);//AGC Control
halRfWriteReg(WORCTRL,0xFB); //Wake On Radio Control
halRfWriteReg(FREND1,0xB6); //Front End TX Configuration
halRfWriteReg(FREND0,0x11); //Front End TX Configuration
halRfWriteReg(FSCAL3,0xE9); //Frequency Synthesizer Calibration
halRfWriteReg(FSCAL2,0x2A); //Frequency Synthesizer Calibration
halRfWriteReg(FSCAL1,0x00); //Frequency Synthesizer Calibration
halRfWriteReg(FSCAL0,0x1F); //Frequency Synthesizer Calibration
halRfWriteReg(TEST2,0x81); //Various Test Settings
halRfWriteReg(TEST1,0x35); //Various Test Settings
halRfWriteReg(TEST0,0x09); //Various Test Settings*/
halRfWriteReg(IOCFG2,0x0D); //GDO2 Output Pin Configuration
halRfWriteReg(IOCFG0,0x2E); //GDO0 Output Pin Configuration
halRfWriteReg(FIFOTHR,0x47); //RX FIFO and TX FIFO Thresholds
halRfWriteReg(SYNC1,0x7A); //Sync Word, High Byte
halRfWriteReg(SYNC0,0x0E); //Sync Word, Low Byte
halRfWriteReg(PKTLEN,0x14); //Packet Length
halRfWriteReg(PKTCTRL0,0x32);//Packet Automation Control
halRfWriteReg(FSCTRL1,0x06); //Frequency Synthesizer Control
halRfWriteReg(FREQ2,0x10); //Frequency Control Word, High Byte
halRfWriteReg(FREQ1,0xB0); //Frequency Control Word, Middle Byte
halRfWriteReg(FREQ0,0x8A); //Frequency Control Word, Low Byte
halRfWriteReg(MDMCFG4,0xAC); //Modem Configuration
halRfWriteReg(MDMCFG2,0x30); //Modem Configuration
halRfWriteReg(DEVIATN,0x40); //Modem Deviation Setting
halRfWriteReg(MCSM0,0x18); //Main Radio Control State Machine Configuration
halRfWriteReg(FOCCFG,0x16); //Frequency Offset Compensation Configuration
halRfWriteReg(AGCCTRL2,0x43);//AGC Control
halRfWriteReg(AGCCTRL1,0x49);//AGC Control
halRfWriteReg(WORCTRL,0xFB); //Wake On Radio Control
halRfWriteReg(FREND0,0x11); //Front End TX Configuration
halRfWriteReg(FSCAL3,0xEA); //Frequency Synthesizer Calibration
halRfWriteReg(FSCAL2,0x2A); //Frequency Synthesizer Calibration
halRfWriteReg(FSCAL1,0x00); //Frequency Synthesizer Calibration
halRfWriteReg(FSCAL0,0x1F); //Frequency Synthesizer Calibration
halRfWriteReg(TEST2,0x81); //Various Test Settings
halRfWriteReg(TEST1,0x35); //Various Test Settings
halRfWriteReg(TEST0,0x09); //Various Test Settings
}
Чт ноя 01, 2018 15:45:29
Пт ноя 02, 2018 06:25:44
Буду, очень благодарен Вам.По приезду будет время - сконфигурирую свой чип на асинхронный приём
Сб ноя 03, 2018 17:01:52
#define CCxxx0_SNOP 0x3D // No operation. May be used to pad strobe commands to two
POWER_UP_RESET_CC1100();
ItStatus1 = SpiReadRegister(CCxxx0_SNOP); // возврат 0x0f?
void RESET_CC1100(void)
{
SpiTxRxByte(CCxxx0_SRES); //Reset command
}
void POWER_UP_RESET_CC1100(void)
{
Hign_CC1100_CSN;
// for(unsigned int i = 0; i < 512; i++){__NOP();}
nrf_delay_ms(1);
Low_CC1100_CSN ;
nrf_delay_ms(1);
Hign_CC1100_CSN;
nrf_delay_ms(1);
RESET_CC1100(); // Reset CC1100
}