Ср мар 21, 2018 11:38:04
#include "stm32f10x.h"
int main(){
SystemInit();
RCC->APB2ENR |= RCC_APB2ENR_IOPBEN;
GPIOB->CRL |= GPIO_CRL_MODE3;
while(1){
GPIOB->ODR ^= GPIO_ODR_ODR3;
for(uint32_t i=0; i<7200; i++);
}
}
Пт мар 23, 2018 08:26:03
#define AFIO_MAPR_SWJ_CFG_JTAGDISABLE ((uint32_t)0x02000000) /*!< JTAG-DP Disabled and SW-DP Enabled */
RCC->APB2ENR |=RCC_APB2Periph_AFIO;
AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_JTAGDISABLE; // 25 бит все как по даташиту JTAG-DP Disabled and SW-DP Enabled
Пт мар 23, 2018 08:40:07
Пт мар 23, 2018 18:03:01
AFIO->MAPR |=AFIO_MAPR_SWJ_CFG_JTAGDISABLE;
AFIO->MAPR = (AFIO->MAPR & 0xF8FFFFFF) | AFIO_MAPR_SWJ_CFG_JTAGDISABLE;
Пн апр 08, 2019 19:03:14
RCC->APB2ENR |= RCC_APB2ENR_AFIOEN | RCC_APB2ENR_IOPBEN;
AFIO->MAPR = (AFIO->MAPR & 0xF8FFFFFF) | AFIO_MAPR_SWJ_CFG_JTAGDISABLE;
GPIOB->CRL |= GPIO_CRL_MODE3_1 | GPIO_CRL_MODE4_1 | GPIO_CRL_MODE5_1;
while(1)
{
GPIOB->BSRR = GPIO_BSRR_BS3 | GPIO_BSRR_BS4 | GPIO_BSRR_BS5;
for (i=0;i<2000000;i++) { }
GPIOB->BSRR = GPIO_BSRR_BR3 | GPIO_BSRR_BR4 | GPIO_BSRR_BR5;
for (i=0;i<2000000;i++) { }
}
GPIOB->CRL = GPIO_CRL_MODE3_1 | GPIO_CRL_MODE4_1 | GPIO_CRL_MODE5_1;