Вс июл 01, 2012 23:42:16
module front_impulse(reset, clk, sig, strobe);
input clk,reset,sig;
output strobe;
reg sDone,strobe;
always@(posedge clk) begin
if(reset) begin
sDone<=0;
strobe<=0;
end else begin
if(sig && !strobe && !sDone) begin
strobe<=1;
end
if( !sig && !strobe && sDone) sDone<=0;
if(strobe && sig) begin
strobe<=0;
sDone<=1;
end
end
end
endmodule
Пн июл 02, 2012 01:58:31
module front_strobe(reset, clk, sig, strobe);
input clk,reset,sig;
output strobe;
reg q1,q2;
wire d2;
assign strobe = q2 ^ q1;
assign d2 = q1;
always@(posedge clk) begin
if(reset || !sig) begin
q2<=0;
q1<=0;
end else begin
if(!q1) q1<=sig;
if(!q2) q2<=d2;
end
end
endmodule
Пн июл 02, 2012 05:09:28