Вс апр 02, 2017 09:57:14
#include "stm32f0xx.h"
#include "stm32f0xx_rcc.h"
#include "stm32f0xx_gpio.h"
#include "stm32f0xx_spi.h"
#define CS_ON() GPIO_ResetBits(GPIOB, GPIO_Pin_12)
#define CS_OFF() GPIO_SetBits(GPIOB, GPIO_Pin_12)
uint16_t SPIdata=0;
void Allini(void)
{
GPIO_InitTypeDef GPIO_spi;
SPI_InitTypeDef SPI_ini;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
GPIO_spi.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_spi.GPIO_Mode = GPIO_Mode_AF;
GPIO_spi.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_spi.GPIO_OType = GPIO_OType_PP;
GPIO_spi.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOB, &GPIO_spi);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_1);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource14, GPIO_AF_1);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource15, GPIO_AF_1);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
GPIO_spi.GPIO_Pin = GPIO_Pin_12;
GPIO_spi.GPIO_Mode = GPIO_Mode_OUT;
GPIO_spi.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_spi.GPIO_OType = GPIO_OType_PP;
GPIO_spi.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOB, &GPIO_spi);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
SPI_ini.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_ini.SPI_Mode = SPI_Mode_Master;
SPI_ini.SPI_DataSize = SPI_DataSize_16b;
SPI_ini.SPI_CPOL = SPI_CPOL_Low;
SPI_ini.SPI_CPHA = SPI_CPHA_1Edge;
SPI_ini.SPI_NSS = SPI_NSS_Soft;
SPI_ini.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
SPI_ini.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_ini.SPI_CRCPolynomial = 7;
SPI_Init(SPI2, &SPI_ini);
SPI_Cmd(SPI2, ENABLE);
}
int main(void)
{
Allini();
while(1)
{
CS_ON();
SPI_I2S_SendData16(SPI2, 0x12F0);
while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_BSY) == SET) {}
SPIdata = SPI_I2S_ReceiveData16(SPI2);
while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_BSY) == SET) {}
SPI_I2S_SendData16(SPI2, 0x00);
while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_BSY) == SET) {}
SPIdata = SPI_I2S_ReceiveData16(SPI2);
CS_OFF();
}
Пн апр 03, 2017 06:31:46
Сб апр 08, 2017 08:47:13
Software NSS management (SSM = 1): in this configuration, slave select information
is driven internally by the SSI bit value in register SPIx_CR1. The external NSS pin is
free for other application uses