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26.1.3 SPI master transaction sequence
An SPI master transaction is started by writing the first byte, which is to be transmitted by the SPI master, to
the TXD register. Since the transmitter is double buffered, the second byte can be written to the TXD register
immediately after the first one. The SPI master will then send these bytes in the order they are written to the
TXD register.
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Ср июн 29, 2022 20:38:42
Чт июн 30, 2022 18:00:04
// Setup SPI0
NRF_SPI0->PSEL.SCK = 13 << SPI_PSEL_MOSI_PIN_Pos
| 0 << SPI_PSEL_MOSI_PORT_Pos
| SPI_PSEL_MOSI_CONNECT_Connected; // Yes MOSI
NRF_SPI0->PSEL.MISO = SPI_PSEL_MISO_CONNECT_Disconnected; // No MISO
NRF_SPI0->PSEL.MOSI = 0 << SPI_PSEL_MOSI_PIN_Pos
| 1 << SPI_PSEL_MOSI_PORT_Pos
| SPI_PSEL_MOSI_CONNECT_Connected; // Yes MOSI
NRF_SPI0->FREQUENCY = SPI_FREQUENCY_FREQUENCY_M8; // 8 Mbps /
NRF_SPI0->CONFIG = SPI_CONFIG_ORDER_MsbFirst << SPI_CONFIG_ORDER_Pos
| SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos
| SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos; // MSB first
NRF_SPI0->INTENSET = SPI_INTENSET_READY_Disabled << SPI_INTENSET_READY_Pos; // disable IRQ
NRF_SPI0->ENABLE = SPI_ENABLE_ENABLE_Enabled; // enable SPI
NRF_SPI0->TXD = buffer[0];
NRF_SPI0->EVENTS_READY = 0x0UL;
NRF_SPI0->TXD = buffer[0];
for (int n = 1; n < 30; n++)
{
volatile uint32_t stat = 0;
while (!stat)
{
stat = NRF_SPI0->EVENTS_READY;
}
NRF_SPI0->EVENTS_READY = 0x0UL;
NRF_SPI0->TXD = buffer[n];
}