Вт ноя 22, 2022 20:07:19
#include "stm32f4xx.h"
//GPIOA5 TIM2_CH1
int main(void) {
RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // Timer 2 enable
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; // Port A enable
GPIOA->OSPEEDR |= GPIO_OSPEEDR_OSPEED5_1 | GPIO_OSPEEDR_OSPEED5_0; // High speed
GPIOA->OTYPER &= GPIO_OTYPER_OT5; // PP output
GPIOA->MODER |= GPIO_MODER_MODER5_1; //AF mode
GPIOA->AFR[0] |= GPIO_AFRL_AFRL5_1; //AF1 - timer 2
TIM2->PSC = 800;
TIM2->ARR = 7000;
TIM2->CCR1 = 1000;
TIM2->CCER |= TIM_CCER_CC1E; // Enable timer to output
TIM2->CCER &= TIM_CCER_CC1P; // Select active high polarity
TIM2->CCMR1 |= TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1; //PWM mode 1
TIM2->CR1 |= TIM_CR1_CEN; // Start timer
while(1){ };
}
Вт ноя 22, 2022 22:27:31
TIM2->CCER &= TIM_CCER_CC1P; // Select active high polarity
Ср ноя 23, 2022 06:08:45
TIM2->CCER &= TIM_CCER_CC1P; // Select active high polarity
Ср ноя 23, 2022 08:26:21
PA5<PinMode::AF_PushPull_LowSpeed<1>>::mode();
TIM2->PSC = 800;
TIM2->ARR = 7000;
TIM2->CCR1 = 1000;
TIM2->CCMR1 = _VAL2FLD(TIM_CCMR1_CC1S,0) | _VAL2FLD(TIM_CCMR1_OC1M,6) | TIM_CCMR1_OC1PE;
TIM2->CCER = TIM_CCER_CC1E;
TIM2->CR1 = TIM_CR1_CEN;
GPIOA->OTYPER &= ~GPIO_OTYPER_OT5;
Ср ноя 23, 2022 09:58:36
GPIOA->MODER |= GPIO_MODER_MODER5_1;
GPIOA->AFR[0] |= GPIO_AFRL_AFRL5_0
GPIOA->OTYPER &= ~GPIO_OTYPER_OT5;
#include "stm32f4xx.h"
//GPIOA5 TIM2_CH1
int main(void) {
RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // Timer 2 enable
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; // Port A enable
GPIOA->OSPEEDR |= GPIO_OSPEEDR_OSPEED5_1 | GPIO_OSPEEDR_OSPEED5_0; // High speed
GPIOA->OTYPER &= ~GPIO_OTYPER_OT5; // PP output
GPIOA->MODER |= GPIO_MODER_MODER5_1; //AF mode
GPIOA->AFR[0] |= GPIO_AFRL_AFRL5_0; //AF1 - timer 2
TIM2->PSC = 50;
TIM2->ARR = 1000;
TIM2->CCR1 = 200;
TIM2->CCER |= TIM_CCER_CC1P; // Select active high polarity
TIM2->CCMR1 |= TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1; //PWM mode 1
TIM2->CCER |= TIM_CCER_CC1E; // Enable timer to output
TIM2->CR1 |= TIM_CR1_CEN; // Start timer
while(1){ };
}
Ср ноя 23, 2022 10:27:24
Ср ноя 23, 2022 10:35:01
Ср ноя 23, 2022 11:32:39
GPIOA->AFR[0] = ((GPIOA->AFR[0] &~GPIO_AFRL_AFRL0)) | 1 << (5 * 4);
#define AFRL(n, v) (v << (n*4))
#define AFRH(n, v) (v << ((n-8)*4))
GPIOA->AFR[0] = ((GPIOA->AFR[0] &~GPIO_AFRL_AFRL0)) | AFRL(5, 1);
Ср ноя 23, 2022 12:08:15
Ср ноя 23, 2022 13:26:26
Ср ноя 23, 2022 13:46:24