Если у кого-то есть время, желание, помогите разобраться в чем проблема.
Дано: STM32G041J6M6, для управления WS2812B.
Проблема: в функции WS2812B_fill_buf при наступлении условия k=1, при заполнении G-составляющей, при i=1 происходит самопроизвольное присвоение переменной tim_stat значением 0x19. И естественно ничего не работает. В коде в данном месте, явно нет такого присвоения, как такое может быть?
ws2812.h
Спойлер
#ifndef MAIN_H#define MAIN_H
//------------------------Include
#include "stm32g0xx.h"
#include "it.h"
#include "ws2812.h"
//------------------------Define
#define NUMBER_OF_LED 1
#define BUF_LEN (NUMBER_OF_LED*24+1)
//------------------------Variable
typedef struct
{
uint8_t R;
uint8_t G;
uint8_t B;
} RGB_TypeDef;
typedef struct
{
uint16_t H;
uint8_t S;
uint8_t V;
} HSV_TypeDef;
static RGB_TypeDef RGB[BUF_LEN] = {0};
//------------------------Function
void RCC_Cfg(void);
void GPIO_test_cfg(void);
void WS2812_init(void);
void WS2812_send(uint8_t * buf, uint32_t len);
void WS2812_fill_buf(RGB_TypeDef * rgb, uint8_t * buf);
void SysTick_Handler(void);
void DMA1_Channel1_IRQHandler(void);
void TIM17_IRQHandler(void);
void Delay_ms(uint32_t del);
//------------------------
#endif //MAIN_H
ws2812.c
Спойлер
#include "main.h"//------------------------Include
//------------------------Define
#define DMA_STAT_FREE 0
#define DMA_STAT_BSY 1
#define TIM_STAT_FREE 0
#define TIM_STAT_BSY 1
//#define WS2812_ARR (80-1)
//#define WS2812_0 (WS2812_ARR/3)
//#define WS2812_1 ((WS2812_ARR/3)*2)
#define WS2812_ARR (80-1)
#define WS2812_0 25
#define WS2812_1 53
//------------------------Variable
static __IO uint32_t delay_ms = 0;
static __IO uint8_t dma_stat=0;
static __IO uint8_t tim_stat=0;
//static uint8_t led_buf_demo[8] = {WS2812_1,WS2812_0,WS2812_0,0,0,0,0,0};
static uint8_t led_buf[BUF_LEN]={0};
//------------------------Function
//======Main
int main(void)
{
RCC_Cfg();
//GPIO_test_cfg();
WS2812_init();
while(1)
{
//GPIOB->BSRR |= GPIO_BSRR_BS0;
RGB[0].R = 0x80;
RGB[0].G = 0x00;
RGB[0].B = 0x00;
WS2812_fill_buf(RGB, led_buf);
WS2812_send(led_buf, BUF_LEN);
//Delay_ms(15);
RGB[0].R = 0x00;
RGB[0].G = 0x80;
RGB[0].B = 0x00;
WS2812_fill_buf(RGB, led_buf);
WS2812_send(led_buf, BUF_LEN);
//Delay_ms(15);
RGB[0].R = 0x00;
RGB[0].G = 0x00;
RGB[0].B = 0x80;
WS2812_fill_buf(RGB, led_buf);
WS2812_send(led_buf, BUF_LEN);
//Delay_ms(15);
//for(__IO uint32_t i=0; i<100; i++)
//{
//}
//Delay_ms(100);
//GPIOB->BSRR |= GPIO_BSRR_BR0;
//WS2812_send();
//for(__IO uint32_t i=0; i<100; i++)
//{
//}
//Delay_ms(15);
}
}
//======EndMain
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//------------------------WS2812_fill_buf
void WS2812_fill_buf(RGB_TypeDef * rgb, uint8_t * buf)
{
for(__IO uint32_t k=0; k<(BUF_LEN-1); k++)
{
//G
for(__IO uint32_t i=0; i<8; i++)
{
if((rgb[k].G & (0x80>>i)) != 0)
buf[k*24+i] = WS2812_1;
else
buf[k*24+i] = WS2812_0;
}
//R
for(__IO uint32_t i=0; i<8; i++)
{
if((rgb[k].R & (0x80>>i)) != 0)
buf[k*24+8+i] = WS2812_1;
else
buf[k*24+8+i] = WS2812_0;
}
//B
for(__IO uint32_t i=0; i<8; i++)
{
if((rgb[k].B & (0x80>>i)) != 0)
buf[k*24+16+i] = WS2812_1;
else
buf[k*24+16+i] = WS2812_0;
}
}
buf[BUF_LEN-1] = 0;
}
//------------------------WS2812_send
void WS2812_send(uint8_t * buf, uint32_t len)
{
//while(((TIM17->CR1) & TIM_CR1_CEN) == TIM_CR1_CEN)
while(tim_stat != TIM_STAT_FREE)
//while(dma_stat == DMA_STAT_BSY)
{
}
//GPIOB->BSRR |= GPIO_BSRR_BR0;
//TIM_stat_set(TIM_STAT_BSY);
tim_stat = TIM_STAT_BSY;
dma_stat = DMA_STAT_BSY;
//DMA1_Channel1->CCR &= ~DMA_CCR_EN;
//TIM17->CR1 &= ~TIM_CR1_CEN;
DMA1_Channel1->CPAR = (uint32_t)(&TIM17->CCR1);
DMA1_Channel1->CMAR = (uint32_t)(buf);
DMA1_Channel1->CNDTR = len;
DMA1_Channel1->CCR |= DMA_CCR_EN;
TIM17->CR1 |= TIM_CR1_CEN;
}
//------------------------WS2812_init
void WS2812_init(void)
{
uint32_t tmp;
//PB9 AF_2 PP NPuNPd as TIM17_CH_1
RCC->IOPENR |= RCC_IOPENR_GPIOBEN;
tmp = RCC->IOPENR;
(void)tmp;
MODIFY_REG(GPIOB->MODER, GPIO_MODER_MODE9, GPIO_MODER_MODE9_1);
CLEAR_BIT(GPIOB->OTYPER, GPIO_OTYPER_OT9);
SET_BIT(GPIOB->OSPEEDR, GPIO_OSPEEDR_OSPEED9);
CLEAR_BIT(GPIOB->PUPDR, GPIO_PUPDR_PUPD9);
MODIFY_REG(GPIOB->AFR[1], GPIO_AFRH_AFSEL9, GPIO_AFRH_AFSEL9_1);
//TIM17 PWM_1
RCC->APBENR2 |= RCC_APBENR2_TIM17EN;
tmp = RCC->APBENR2;
(void)tmp;
MODIFY_REG(TIM17->CCMR1, TIM_CCMR1_OC1M, TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2);
//MODIFY_REG(TIM17->CCMR1, TIM_CCMR1_OC1M, TIM_CCMR1_OC1PE | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2);
TIM17->CR1 |= TIM_CR1_ARPE; //ARR Preload Enable
TIM17->CCMR1 |= TIM_CCMR1_OC1PE; //CCR1 Preload Enable
TIM17->BDTR |= TIM_BDTR_MOE; //Main Output Enable
TIM17->CCER |= TIM_CCER_CC1E; //CH_1 Output Enable
TIM17->DIER |= TIM_DIER_CC1DE; //Rqst for DMA Enable
TIM17->PSC = 0; //7;
TIM17->ARR = WS2812_ARR; //9;
TIM17->CCR1 = 0;
TIM17->DIER |= TIM_DIER_UIE; //Interrupt Enable
NVIC_EnableIRQ(TIM17_IRQn); //Global Interrupt Enable
tim_stat = TIM_STAT_FREE;
//TIM17->CR1 |= TIM_CR1_CEN;
//DMA1 is TIM17_CH_1
RCC->AHBENR |= RCC_AHBENR_DMA1EN;
tmp = RCC->AHBENR;
(void)tmp;
DMA1_Channel1->CCR &= ~DMA_CCR_EN;
MODIFY_REG(DMA1_Channel1->CCR, (uint32_t)0xFFFF,
DMA_CCR_PSIZE_0 | //Peripheral size 16
DMA_CCR_MINC |
DMA_CCR_DIR | //From memory to Periph
DMA_CCR_TCIE //Transfer Complit Interrupt Enable
);
DMAMUX1_Channel0->CCR = (47 << DMAMUX_CxCR_DMAREQ_ID_Pos);
NVIC_EnableIRQ(DMA1_Channel1_IRQn);
dma_stat = DMA_STAT_FREE;
}
//------------------------Delay_ms
void Delay_ms(uint32_t del)
{
uint32_t cur_del;
cur_del = delay_ms;
while((delay_ms - cur_del) < del)
{
}
}
//------------------------GPIO_test_cfg
void GPIO_test_cfg(void)
{
uint32_t tmp;
//GPIO for Test PB0 OUT PP PD RST
RCC->IOPENR |= RCC_IOPENR_GPIOBEN; //GPIOC Clock Enable
tmp = (RCC->IOPENR);
(void)tmp;
MODIFY_REG(GPIOB->MODER, GPIO_MODER_MODE0, GPIO_MODER_MODE0_0);
CLEAR_BIT(GPIOB->OTYPER, GPIO_OTYPER_OT0);
SET_BIT(GPIOB->OSPEEDR, GPIO_OSPEEDR_OSPEED0);
MODIFY_REG(GPIOB->PUPDR, GPIO_PUPDR_PUPD0, GPIO_PUPDR_PUPD0_1);
GPIOB->BSRR |= GPIO_BSRR_BR0;
}
//------------------------Cfg_RCC
void RCC_Cfg(void)
{
__IO uint32_t tmpreg;
SET_BIT(RCC->APBENR2, RCC_APBENR2_SYSCFGEN);
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_SYSCFGEN);
(void)tmpreg;
SET_BIT(RCC->APBENR1, RCC_APBENR1_PWREN);
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_PWREN);
(void)tmpreg;
//NVIC_SetPriority(SysTick_IRQn, 3);
MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, FLASH_ACR_LATENCY_1);
//CLEAR_BIT(FLASH->ACR, FLASH_ACR_LATENCY);
while(((FLASH->ACR) & FLASH_ACR_LATENCY) != FLASH_ACR_LATENCY_1)
{
}
SET_BIT(RCC->CR, RCC_CR_HSION);
while(((RCC->CR) & RCC_CR_HSIRDY) != RCC_CR_HSIRDY)
{
}
MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR,
RCC_PLLCFGR_PLLSRC_HSI | (8 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_0 | RCC_PLLCFGR_PLLP_0 | RCC_PLLCFGR_PLLQ_0);
SET_BIT(RCC->CR, RCC_CR_PLLON);
SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLREN);
while(((RCC->CR) & RCC_CR_PLLRDY) != RCC_CR_PLLRDY)
{
}
CLEAR_BIT(RCC->CFGR, RCC_CFGR_HPRE);
MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_CFGR_SW_1);
while(((RCC->CFGR)& RCC_CFGR_SWS) != RCC_CFGR_SWS_1)
{
}
CLEAR_BIT(RCC->CFGR, RCC_CFGR_PPRE);
SystemCoreClock = 64000000;
SysTick_Config(SystemCoreClock/1000);
}
//======INTERRUP
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//------------------------TIM17_IRQHandler
void TIM17_IRQHandler(void)
{
if(((TIM17->SR) & TIM_SR_UIF) == TIM_SR_UIF)
{
TIM17->SR &= ~TIM_SR_UIF;
if(dma_stat == DMA_STAT_FREE)
{
TIM17->CR1 &= ~TIM_CR1_CEN;
//GPIOB->BSRR |= GPIO_BSRR_BS0;
//TIM_stat_set(TIM_STAT_FREE);
tim_stat = TIM_STAT_FREE;
}
}
}
//------------------------DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
{
if(((DMA1->ISR) & DMA_ISR_TCIF1) == DMA_ISR_TCIF1)
{
DMA1->IFCR |= DMA_IFCR_CTCIF1;
DMA1_Channel1->CCR &= ~DMA_CCR_EN;
dma_stat = DMA_STAT_FREE;
}
}
//------------------------Systick_Handler
void SysTick_Handler(void)
{
//if(delay_ms>0)
//delay_ms--;
delay_ms++;
}
//------------------------
Прошу прощения за дубликат, что-то пошло не так
.